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AMD has officially unveiled the next-generation of EPYC processors featuring the Zen 2 microarchitecture, and they look set to transform the server market once again.
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AMD EPYC “Rome” processors will feature up to 64 Zen 2 cores by combining up to eight 7-nanometer chiplets with a 14-nanometer I/O die. According to AMD, these new chips will bring twice the performance and four times the floating-point power per socket compared to the current-generation EPYC chips.
This will make EPYC “Rome” the world’s first 7-nanometer datacenter processor.
Along with up to twice the cores, EPYC “Rome” will be the first PCIe 4.0 capable x86 server CPU featuring 128 lanes allowing it to make full use of next-generation accelerators such as the Radeon Instinct MI60, hardware that’s built around the Vega 7-nanometer GPU.
The new chips will also come with an eight-channel DDR4 memory controller capable of supporting up to 4TB of DRAM per socket.
Now you might be thinking that all these improvements will require a socket upgrade. Fear not, because not only will the EPYC “Rome” chips be socket compatible with existing EPYC “Naples” silicon, but it will also be forward compatible with AMD’s “Milan” CPUs that will use the Zen 3 microarchitecture.
This, AMD hopes, will ease the workload that both customers and server makers have to do to make the switch to the new silicon.
AMD is currently sampling EPYC “Rome” chips with customers, with the chips expected to launch sometime in 2019.
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Related Topics:
Data Centers
PCs
Servers
Storage
Networking
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